Version 11/13/05   EE 40 Lecture Viewgraphs in PDF Fall 05 

Topics, Reading and Dates

PDF with 2/page   PDF with 6/page    Topic Group  

Lectures after Midterm #2

L#30_11/14/05         L#30_11/14/05        Midterm Return, Lab Project, CMOS Issues

L#31_11/16/05         L#31_11/16/05        CMOS: Capacitance and Resistance Model for Delay

L#32_11/18/05         L#32_11/18/05        CMOS: Multiple Inout Gates, Dalays and Cascade

L#33_11/21/05         L#33_11/21/05        CMOS: Synchronization via Latches and Clocks

L#34_11/23/05         L#34_11/23/05        CMOS: Piplining for throughput at Cost of Latency
UCH 11/24/05 & 11/25/05  Thanksgiving

L#35_11/28/05         L#35_11/28/05        Total Solution (Particular plus forced)

L#36_11/30/05         L#36_11/30/05         RLC 2nd Order Response

L#37_12/02/05         L#37_12/02/05         RLC 2nd Order Response (Cont.)

L#38_12/05/05         L#38_12/05/05         Microfabrication

L#39_12/07/05         L#39_1207/05          Nano Technology

L#40_12/09/05         L#40_12/09/05         Review
FINAL EXAM 8-11 AM Monday 12/19/05 Room TBA

Lectures prior to Midterm #2

L#01_08/29/05         L#01_08/29/05        Overview, Energy and Information, Basis Boolean

L#02_08/31/05         L#02_08/31/05        Charge, Current Voltage, Power

L#03_09/02/05         L#03_09/02/05        I-V, KCL, KV
UCH  09/05/05         Labor Day

L#04_09/07/05         L#04_09/07/05        Resistor Circuits, Node Analysis

L#05_09/09/05         L#05_09/09/05        Node and Mesh Analysis (Resistors)

L#06_09/12/05         L#06_09/12/05        Thevenin, Norton, Superposition

L#07_09/14/05         L#07_09/14/05        Dependent Sources in Circuits

L#08_09/16/05         L#08_09/16/05        Equivalent Input and Output Circuit Blocks

L#09_09/19/05         L#09_09/19/05        Capacitors and Inductors

L#10_09/21/05         L#10_09/21/05        RC Transients

L#11_09/23/05         L#11_09/23/05        RL Transients and Logic as RC Circuits

L#12_10/26/05         L#12_10/27/05        Midterm #1 Definitiion; RC Model for Logic Gate Delay

L#13_10/28/05         L#13_10/28/05        Quiz #1; Cascade Delay and Dynamic Power

L#14_10/30/05         L#14_10/30/05        Midterm Review; Sinsoidal Sources and Total Solution

L#15_10/03/05         L#15_10/03/05        Complex Number Manipulation, Phasor Representation

Midterm #1 on 10/05/05 on Lectures 1-11 and HW 1-5
L#16_10/07/05         L#16_10/07/05        Circuit Analysis with Phasors and Complex  Impedances

L#17_10/10/05         L#17_10/10/05        Power and Equivalent SOurces with Phasors

L#18_10/12/05         L#18_10/12/05        Frequency Response

L#19_10/14/05         L#19_10/14/05        Bode Plots, Resonance

L#20_10/17/05         L#20_10/17/05        Op-Amps: Ideal

L#21_10/19/05         L#21_10/19/05        Op-Amps: Design and Limitations

L#22_10/21/05         L#22_10/21/05        Op-Amps: Diffrentiation and Integration

L#23_10/24/05         L#23_10/24/05        Diode: Physics and Load Line

L#24_10/26/05         L#24_10/26/05        Diode: Circuit Model and Logic

L#25_10/28/05         L#25_10/28/05        Diode: Circuits for signal modification, Start MOS

L#26_10/31/05         L#26_10/31/05        Midterm #2 Definition; MOSFET: Physics

L#27_11/02/05         L#27_11/02/05        Quiz #2; MOSFET: I-vs V and Load Line Solution

L#28_11/04/05         L#28_11/04/05        Midterm #2 Review: MOSFET: NMOS and CMOS Inverters

L#29_11/07/05         L#29_11/07/05        CMOS Voltage Transfer Characteristics
Midterm on 11/09/05 on Lectures 14-25 through Diodes (no MOS)

UCH  11/11/05         Veteran's Day