EE 245 Final Project Fall 2001 (draft version, may be modified
Your final project will consist of a four page, double column format report
and one or more CIF files.
You are strongly encouraged to choose a project which can be fabricated in
one (or more) of the standard processes discussed in class: MOSIS CMOS,
MCNC/MUMPS, or DRIE. You should try to choose a project which will yield
publishable results if the devices are functional after testing.
Partners are encouraged, but no more than two people may work on the same
The final report should be in two column format, and a maximum of 4 pages
long. Reports not submitted in this format will not be read, and the authors
will be given an incomplete in the class. The report is due December 7th (it
must be postmarked by 12/7). The reports will be copied and distributed to the class during the final
(Wednesday, December 12th). Late reports will not be accepted.
Your report should include at least the following sections
This is not a required outline, but it is highly recommended.
- Introduction, describing what you are trying to do, and any related
work in the field.
- Design, describing the fabrication method chosen (one
paragraph) and a description of the design decisions made. Basic analysis
should be included in this section to support the design decisions.
- Test structures, describing the design of the several
structures which will verify performance of the subcomponents of the system.
- Expected results, illustrating the expected performance of
your test structures, and your overall system.
- Conclusion, explaining why anyone will care if all of this
Layout should be design rule correct. Layout should be emailed to lzhou@eecs
in standard cif format. The top level cell should be named [user]_project .
Layout is due December 8th at midnight.
*In addition, you may submit a layout file with top level cell named
[user]_fab . If this cell is
*then it will be placed on the next run for the
appropriate foundry. There is no strict deadline for the ``fab'' layout.
- *design rule correct
- *less than 2 square millimeters (MOSIS) or 10 square millimeters
- Project proposals. Write at least one paragraph, preferably with
figures, describing your proposed projects. Give me at least two proposals.
Due Oct. 18th.
- Detailed outline. Include sketches of main system components
test structures, and a primitive analysis that shows that your device
will work for your purpose. Due Nov. 15th.
- Test structures. Analysis, graphs of expected performance,
- Final layout. Due December 8th.
- Final ``camera ready'' copy. Due December 7th.
- *Layout for fab (optional). No deadline.