NTU 6341 / EECS 141

Digital Integrated Circuits

Fall 2007 Syllabus

 

 

Tue Sep 4, 2007

Course Introduction

Thu Sep 6, 2007

IC Manufacturing and Design Rules

Tue Sep 11, 2007

Design Metrics

Discussion Section 1

Thu Sep 13, 2007

CMOS Inverter, MOS Transistor Basics

Introductory Conference Call

Fri Sep 14, 2007

Homework 1 DUE

Tue Sep 18, 2007

MOS Transistor Model—VTC

Discussion Section 2

Thu Sep 20, 2007

MOS Capacitances and Propagation Delay

Mon Sep 24, 2007

Homework 2 DUE

Tue Sep 25, 2007

Performance, Power Consumption

Discussion Section 3

Thu Sep 27, 2007

Buffer Sizing, Logical Effort

Tue Oct 2, 2007

CMOS Scaling

Discussion Section 4

Thu Oct 4, 2007

Wires

Discussion Section 5

Mon Oct 8, 2007

Homework 3 DUE

Tue Oct 9, 2007

Wire Models

Thu Oct 11, 2007

CMOS Logic

Discussion Section 6

Tue Oct 16, 2007

Designing for Speed and Power

Thu Oct 18, 2007

Pass Transistor Logic

Discussion Section 7

Mon Oct 22, 2007

Homework 4 DUE

Tue Oct 23, 2007

Dynamic Logic

Thu Oct 25, 2007

Adders

Discussion Section 8

Mon Oct 29, 2007

MIDTERM EXAM

Tue Oct 30, 2007

Adders and Multipliers

Thu Nov 1, 2007

Power in CMOS

Discussion Section 9

Fri Nov 2, 2007

MIDTERM EXAM DUE

Tue Nov 6, 2007

Power in CMOS

Thu Nov 8, 2007

Sequential Circuits

Discussion Section 10

Tue Nov 13, 2007

Latches and Registers

Discussion Section 11

Thu Nov 15, 2007

Timing and Clock Distribution

Mon Nov 19, 2007

Homework 5 DUE

Tue Nov 20, 2007

Interconnect Issues

Discussion Section 12

Thu Nov 27, 2007

Power Distribution

Mon Nov 28, 2007

Homework 6 DUE

Tue Nov 29, 2007

Memory

Discussion Section 13

Thu Dec 4, 2007

Memory

Tue Dec 6, 2007

Perspectives

Wed Dec 7, 2007

Projects DUE

Fri Dec 14, 2007

Homework 7 DUE

Wed Dec 17, 2007

Final Exam

Fri Dec 21, 2007

Final Exam DUE