EE244: Design Technology for Integrated Circuits and Systems Outline Lecture 7.2

11/14/97


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Table of Contents

EE244: Design Technology for Integrated Circuits and Systems Outline Lecture 7.2

Minimizing Resources Using Force-Directed Techniques

Basic Force-Directed Algorithm

5th-Order Wave-Digital Filter

5th Order Wave-Digital Filter Dataflow Graph

Results from List Scheduling

ASAP / ALAP Schedules for Case 1

ASAP / ALAP Schedules for Case 2

Representative Results for 5th Order WDF

Pipelining: Definitions

Basic Principles of Pipelining

Approaches to Pipelining

Allocation

Basic Constructive/Iterative Allocation

Allocation and Assignment

Approaches to Allocation and Assignment

Register Allocation and Assignment

Results for 5th-Order WDF

State and Statements

State and Statements

State and Statements

State Counter Generation

State and Statements

Behavior and Structure

Behavior and Structure: Two Faces of the Same Coin

Behavior and Structure

Data and Control

3-Bit Parity Function: "Control-Oriented"

3-Bit Parity Function: "Dataflow-Oriented"

Implementing Any Digital Function Using a Single NAND Gate

 Author: Richard Newton

Email: rnewton@ic.eecs.berkeley.edu

Home Page: http://www-inst.eecs.berkeley.edu/~ee244