Lectures and Office Hours

509 Cory
Lectures Tues, Thurs 9:30 am - 11:00 am 293 Cory Borivoje Nikolic
Office Hours Tues 11:00 am - 12:00 pm Borivoje Nikolic
Mon 1:00 pm - 2:00 pm 504 Cory Daniel Grubb

Homework

Exams

  • There will be four quizzes during the semester.
  • Final exam will be held during the last week of the course.

Course Outline

Week Date Lecture Topic Recording Reading Lab Homework Homework Solution
1 1/21 Class Organization & Introduction to Course Content Annotated No homework!
2 1/23 Scaling Trends in Modern Technologies Annotated
3 1/28 Features of Modern Technologies Annotated
4 1/30 Transistor Models (8-up) (1-up) Annotated
5 2/4 Leakage and Delay Models (8-up) (1-up) Annotated
6 2/6 Standard Cells (8-up) (1-up) Annotated Lab 1: VLSI Flow Hw 1 Solutions
7 2/11 Static Timing (8-up) (1-up) Annotated
8 2/13 Technology Variability (8-up) (1-up) Annotated
9 2/20 Flip-Flop Timing (8-up) (1-up) Annotated Partovi01
10 2/25 Latch Timing (8-up) (1-up) Annoated Stojanovic99
11 2/27 Flip-Flops (8-up) (1-up) Annotated Lab 2 Hw 2 Solutions
12 3/3 Memory (8-up) (1-up) Annotated
13 3/5 SRAM I (8-up) (1-up) Annotated

Seevinck1987

Bhavnagarwala2005

Khalil2008

Grossar2006
14 3/10 SRAM II (8-up) (1-up) Annotated Zoom capture

Calhoun2009
15 3/12 SRAM III (8-up) (1-up) Annotated Zoom capture

Horiguchi2011

Itoh2007

 Lab 3 Hw 3
16 3/17 SRAM options (8-up) (1-up) Annotated Zoom capture

Markovic2004

Chandrakasan1995

Zyuban2004
17 3/19 Power-Performance Tradeoffs (8-up) (1-up) Annotated Zoom capture
18 3/31 Power-Performance Optimization (8-up) (1-up) Annotated Zoom capture

Rabaey Ch 4

Rabaey Ch 5
19 4/7 Voltage Scaling (8-up) (1-up) Annotated Zoom capture
20 4/9 Dynamic Voltage Scaling (8-up) (1-up) Annotated Zoom capture Burd'00
21 4/14 Dynamic Voltage Scaling 2(8-up) (1-up) Annotated Zoom capture
22 4/16 Leakage (8-up) (1-up) Annotated Zoom capture Rabaey Ch. 8
23 4/21 Sleep modes (8-up) (1-up) Annotated Zoom capture
24 4/23 Sleep modes (8-up) (1-up) Annotated Zoom capture Wong'06
25 4/28 Supply (8-up) (1-up) Annotated Zoom capture

Resources

Textbooks

  • Optional Low Power Design Essentials, J. Rabaey, Springer, 2009.
  • Baseline Digital Integrated Circuits: A Design Perspective, Jan M. Rabaey, Anantha Chandrakasan, Borivoje Nikolić
  • Useful CMOS VLSI Design, Neil Weste, David Harris
  • Useful Design of High-Performance Microprocessor Circuits, A. Chandrakasan, W. Bowhill, F. Fox, IEEE Press, 2001.

Staff

bora photo Borivoje Nikolic bora at berkeley dot edu
daniel photo Daniel Grubb dpgrubb at berekley dot edu

Grading

Class

Assignments 20%
Design Project 40%
Quizzes 10%
Final Exam 30%

Cheating Policy

  • If you turn in someone else’s work as if it were your own, you are guilty of cheating.  This includes problem sets, answers on exams, lab exercise checks, project design, and any required course turn-in material.
  • Also, if you knowingly aid in cheating, you are guilty.
  • We have software that compares your submitted work to others.
  • However, it is okay to discuss with others lab exercises and the project (obviously, okay to work with project partner). Okay to discuss homework with others. But everyone must turn in their own work.
  • Do not post your work on public repositories like github (private o.k.)
  • If we catch you cheating, you will get negative points on the assignment: It is better to not do the work than to cheat!  
If it is a midterm exam, final exam, or final project, you get an F in the class.  All cases of cheating reported to the office of student conduct.