Due | Problems | Solutions | Notes |
---|---|---|---|
1/26, 10:10am | Homework 1 | Solution 1 | the printed solution distributed in class had a missing negative, the pdf file has been updated. |
2/2, 10:10am | Homework 2 | Solution 2 | additional information |
2/9, 10:10am | Homework 3 | Solution 3 | For the last problem, assume that the metal layer can be treated like N+ polysilicon. |
2/16, 10:10am | Homework 4 | Solution 4 | For the last problem of homework 4, you do not have to include channel length modulation in your current equation, ie, lambda=0. |
2/21, 10:10am | Homework 5 | Solution 5 | Problem 5.1 has a typo, the gate voltage should be 5 volts. |
3/2, 10:10am | Homework 6 | Solution 6 | |
3/9, 10:10am | Homework 7 | Solution 7 | |
3/16, 10:10am | Homework 8 | Solution 8 | 8.2 - Wn=Wp=2.0um for both diodes. |
3/21, 10:10am | Homework 9 | Solution 9 | |
4/6, 10:10am | Homework 10 | Solution 10 | |
4/13, 10:10am | Homework 11 | Solution 11 | |
4/20, 10:10am | Homework 12 | Solution 12 | |
4/27, 10:10am | Homework 13 | Solution 13 | For problem 1 the magnitude of the gain should be greater than 75. For both problem 1 and 2 do not use V_BE=0.7V, instead use I_S=1e-16A. |
5/4, 10:10am | Homework 14 | Solution 14 |