|
Week |
Date |
Lecture | Reading (H&S) | Labs (tentative) |
|
1 |
8/29 |
Introduction; Semiconductors Microelectronics, Moore's Law Semiconductor basics: intrinsic silicon Electrons, holes, charge neutrality Doping: donors, acceptors, compensation |
1.1, 1.3.1-2 2.1-3 |
no labs |
|
9/1 |
Charge transport and the IC resistor |
2.4.1-2, 2.6 | ||
|
2 |
9/6 |
IC fabrication IC resistor: non-linear resistor IC resistor: capacitance (interconnect) Approximate passive models: extraction Diffusion currents |
2.5, 2.6 2.4.3 |
scheduling the labs |
|
9/8 |
Electrostatics review 1-D Gauss's law and boundary conditions Metal-metal capacitor layout Charge, fields, and capacitance |
3.1 |
||
|
3 |
9/13 |
pn Junctions: thermal equilibrium |
3.2-3.3 |
#1 Electronic Test Equipment |
|
9/15 |
pn Junctions: reverse bias, forward bias and Capacitance Charge, field, potential in reverse bias: qJ = f(vD) pn junction capacitance: Cj = dqJ / dvD pn diode in forward bias: a first pass and the i-v relationship |
3.4.1-2, 3.5 |
||
|
4 |
9/20 |
MOS Capacitors surface charge in thermal equilibrium depletion, accumulation, and inversion qG = f(vGS) and Cg = dqG / dvGS |
3.7, 3.9 | #2 Introduction to PSPICE |
|
9/22 |
MOSFETs: large-signal model Symbols and drain characteristics triode and saturation regions backgate effect MOSFET sample & hold circuit graphical analysis analytical solution; SPICE |
4.1-3 |
||
|
5 |
9/27 |
Common Source Amplifier (resistive load) Large-signal transfer curve Small-signal operation: movtivate small-signal model |
8.3 |
#3 The IC Resistor |
|
9/29 |
MOSFET small-signal model
transconductance, including backgate
output resistance, capacitances |
4.5.2-4 |
||
|
6 |
10/4 |
Small-signal analysis Body effect PMOS model |
4.4.1, 4.5.2, 4.5.6 | #4 MOSFET Characterization |
|
10/6 |
MOSFET current sources (and sinks) diode-connected MOSFET as voltage source current mirror concept Audio Digital-to-Analog Converter Example |
8.4, 9.4.1, 9.4.3-5 |
||
|
7 |
10/11 |
Two-Port Models four amplifier types: voltage, current, trans-G, trans-R tests to find amplifier parameters |
8.5 |
|
Midterm review, 6:30-7pm, 277 Cory | no labs: midterm week |
|
10/13 |
Midterm I Sibley Auditorium 6:30-8pm | |||
8 |
10/18 |
Common-Drain Amplifier voltage gain, input and output resistances |
8.9.2 |
#5 Single-Stage MOS Amplifiers |
|
10/20 |
Common-Gate Amplifier current gain, input and output resistances |
8.8.2 | ||
9 |
10/25 |
Frequency response, MOSFET ac models Transfer functions; poles and zeroes Bode plot techniques |
10.1 4.5.4-7, 4.6.2-4, 10.2 |
#6 Current and voltage sources |
|
10/27 |
Frequency response phasor analysis for sinusoidal steady-state signals Bode plots |
10.1-2
|
||
|
10 |
11/1 |
Frequency analysis, second order circuits |
10.1 |
#7 Frequency response |
|
11/3 |
Second-order circuits, amplifier response Unity gain frequency, gain-bandwidth product |
10.2 |
||
|
11 |
11/8 |
Frequency-domain analysis insight &
approximations Feedforward zero Miller approximation, method of time constants |
10.2, 10.3.2, 10.4.3-5 |
#8 Multistage amplifiers |
|
11/10 |
Common gate, common drain frequency response,
Multi-stage amplifiers boostrapping of gate-source capacitance Multi-stage amplifiers |
9.1, 9.3, 9.5 10.5, 10.6 |
||
|
12 |
11/15 |
Multistage amplifiers: the cascode two-port models current and voltage bias design ac analysis |
9.5, 10.8 | |
|
11/15 |
Midterm review, 6:30-8pm, 277 Cory, | no labs: midterm week | ||
|
11/17 |
Midterm II Sibley Auditorium, 6-7:30 | |||
|
13 |
11/22 |
Forward-biased pn junction, Bipolar Junction Transistor Modes of operation of a BJT |
7.1 | |
| Thanksgiving | ||||
|
14 |
11/29 |
Bipolar Junction Transistor |
7.1-7.3 | |
|
|
12/1 |
Bipolar Junction Transistor |
7.4-7.5 | #9 Bipolar transistor |
|
15 |
12/6 |
Bipolar Junction Transistor (cont.) |
8.2, 8.6, 8.7, 8.8.1, 8.9.1 | |
|
|
12/8 |
Frequency Dependence of Input and Output
Impedances |
8.9.1, 10.5.1 | |
|
12/20 |
Final Exam, 12:30 - 3:30 pm |
* because of Labor Day, labs scheduled for Monday will be held one week late