Wk |
Date |
Lecture Topic |
Reading |
Section |
Lab |
Homework |
Project |
1 | 06/20 M | Intro, Number Representation | Course Policies (5th) P&H: 2.4 Binary slides | Section 0: Number Representation | Lab 0: git | HW0: Number Representation Due 06/26 @ 23:59:59
Mini-bio | |
06/21 Tu | C Intro, Pointers | Brian Harvey's Intro to C K&R Ch. 1-5 |
06/22 W | C Arrays, Strings, Pointers | K&R Ch. 5-6 C Reference Slides | Section 1: C Basics | Lab 1: C and GDB |
06/23 Th | C Memory Management, Usage | K&R: 7.8.5, 8.7 |
Guerrilla Session: Number Representation, C, Th 06/23 5-7pm @ 105 North Gate |
2 | 06/27 M | Intro to Assembly Language, MIPS Intro | (5th) P&H: 2.1-2.3 | Section 2: C Memory Management and MIPS Intro | Lab 2: Advanced C, Memory Management | HW1: C Concepts Due 07/03 @ 23:59:59 | Project 1: Flights Due 07/03 @ 23:59:59 |
06/28 Tu | MIPS, MIPS Functions | (5th) P&H: 2.6 - 2.9, 2.10 (only p.111-113), A.6 |
06/29 W | MIPS Instruction Formats | (5th) P&H: 2.5, 2.10 | Section 3: MIPS Procedures and Instruction Formats | Lab 3: MIPS Assembly |
06/30 Th | Compiler, Assembler, Linker, Loader (CALL) | (5th) P&H: 2.12, A.1-A.4 |
Guerrilla Session: MIPS, CALL, Th 06/30 5-7pm @ 105 North Gate |
3 | 07/04 M | Fourth of July Holiday | Section 4: Holiday | Lab 4: MIPS Functions, Bit Manipulation | HW2: MIPS Due 07/10 @ 23:59:59 | Project 2-1: MIPS Assembler Due 07/10 @ 23:59:59 |
07/05 Tu | Intro to Synchronous Digital Systems (SDS), Logic
MT1 review session 07/05 5-8pm @ 100 GPB | SDS Handout Logic Handout (5th) P&H: B.2-B.3 |
07/06 W | Functional Units, FSMs | Blocks Handout (5th) P&H: 4.2, B.3-B.6 State Handout | Section 5: Logic and SDS | Lab 5: Logisim |
07/07 Th | Midterm 1 (covers up to and including 06/30 lecture) (Midterm) (Answers) |
Guerrilla Session: Synchronous Digital Systems, Th 07/07 5-7pm @ 105 North Gate |
4 | 07/11 M | MIPS Datapath, Single-Cycle Control Intro | (5th) P&H: 4.1, 4.3, 4.4 | Section 6: Single-Cycle Datapath | Lab 6: More Logisim, ALU Design | HW3: Logic, Timing Due 07/17 @ 23:59:59 | Project 2-2: MIPS Linker Due 07/17 @ 23:59:59 |
07/12 Tu | MIPS Single-Cycle Control | (5th) P&H: 4.5-4.8 |
07/13 W | MIPS 5-Stage Pipeline/Hazards | (5th) P&H: 4.10, 4.11 | Section 7: Pipelining | Lab 7: CPU Project Prep |
07/14 Th | Memory Hierarchy, Fully Associative Caches | (5th) P&H: 5.1, 5.2, 5.3, 5.4, 5.8, 1.6 Cache Flowchart |
Guerrilla Session: MIPS CPU (Datapath, Control), Th 07/14 5-7pm @ 105 North Gate |
5 | 07/18 M | Caches: Direct-mapped, Set-associative, Program Performance with Caches | <See above> | Section 8: Caches | Lab 8: Caches | HW4: Caches & Floating Point Due 07/24 @ 23:59:59 | Project 3-1: ALU and Regfile Due 07/24 @ 23:59:59 |
07/19 Tu | Multilevel Caches, Cache Questions | <See above> |
07/20 W | Performance, Floating Point | (5th) P&H: 3.5. 3.9 IEEE 754 Simulator | Section 9: Floating Point, AMAT, Flynn Taxonomy | Lab 9: SIMD Instructions |
07/21 Th | Flynn Taxonomy, Data-Level Parallelism | (5th) P&H: 1.7, 1.8, 6.1, 6.2, 6.3, 6.7 |
Guerrilla Session: Caches, Floating Point, Th 07/21 5-7pm @ 105 North Gate
MT2 review session 07/22 3-6pm @ 10 Evans |
6 | 07/25 M | Midterm 2 (in lecture, covers up to and including 07/20 lecture) (Midterm) (Solutions) | Section 10: Proj3-2, Midterm Debrief | Lab 10: Thread-Level Parallelism | HW5: Performance Programming Due 07/31 @ 23:59:59 | Project 3-2: CPU Due 08/01 @ 23:59:59 |
07/26 Tu | Amdahl's Law, Thread-Level Parallelism, OpenMP Intro | (5th) P&H: 6.5, 5.10, 2.11 OpenMP Summary Card |
07/27 W | TLP/OpenMP Part 2, Cache Coherence, and OpenMP Sharing Issues | (5th) P&H: 5.10 | Section 11: Cache Coherence, Synchronization | Lab 11: MapReduce and Spark |
07/28 Th | Warehouse Scale Computing, MapReduce (Spark) | The Datacenter as a Computer: Ch 1, Ch 2.4, Ch 3, 5.1-5.3 MapReduce Paper |
Guerrilla Session: Parallel Programming, Th 07/28 5-7pm @ 105 North Gate |
7 | 08/01 M | OS Support, Base and Bounds, Virtual Memory Intro | (5th) P&H: 5.13, 5.15, 5.16 | Section 12: WSC, Map Reduce and Spark | Lab 12: Virtual Memory | HW6: VM, I/O, Parity, and ECC Due 08/09 @ 23:59:59 | Project 4: Performance Programming Due 08/08 @ 23:59:59 |
08/02 Tu | Virtual Memory | (5th) P&H: 6.9 (only p.4-10), 4.9 |
08/03 W | Dependability: Parity, ECC, RAID | (5th) P&H: 5.5, B-65 to B-67 Berkeley RAID Paper | Section 13: Virtual Memory | Lab 13: 1st Hour: Virtual Memory Continued 2nd Hour: Extra Office Hours |
08/04 Th | I/O: Interrupts, Disks, Networking | (5th) P&H: 5.2, 5.5, 5.11 |
Guerrilla Session: Virtual Memory, I/O, ECC, Th 08/04 5-7pm @ 105 North Gate
Final review session Sun 08/07 1-5pm @ 120 Latimer |
8 | 08/08 M | Final Exam Live Demo | <None> | Section 14: I/O, Dependability | Lab 14: Extra Office Hours | | |
08/09 Tu | Summary, What's Next? | <None> |
08/10 W | No Lecture: Final Studying | <None> | Section 15: Extra Office Hours | |
08/11 Th | Final Exam: 9am-12pm in 100 GPB (LAB 101 & 106), 2060 VLSB (LAB 102 & 105), and 159 Mulford (LAB 103 & 104). (Final) (Solutions) |