CS61C Summer 2013 Lab 11: Virtual Memory

Goals

Setup

You will be using a program called Camera this week. Camera is a cache and virtual memory simulator, and you will be using the virtual memory simulation features for this lab. Like MARS and Logisim, Camera is a java-based application that you can download to your home computer. You can get the jar file by copying it from ~cs61c/bin/Camera.jar on the instructional machines. To run Camera, type:

$ java -jar ~cs61c/bin/Camera.jar &

Note: If you wish to run Camera remotely, make sure you are running an X-Server (like XMing) with tunneling enabled. Tunneling does NOT work on the Orchard machines. Additionally, there is a font issue on the Hive machines that shifts most of the necessary buttons out of view. We highly recommend you run Camera remotely or connect to one of these servers.

Exercises

Exercise 1: A Sample Run (CAMERA)

Run Camera and select the VM option, opening a visualization of a virtual memory system:

At this point these should all be empty as we haven't done anything yet (everything is "cold"). Click the button labeled "Auto Generate Add. Ref. Str." at the right-hand side of the window. This will generate a set of ten address references. You can think of these as a series of MIPS "load word" instructions reading from the memory address specified. Click the button labeled "Next" to begin the simulation.

For the rest of this exercise you are at the mercy of the "PROGRESS UPDATE" box. After each click of the "Next" button examine the contents of the box and the current state of the memory system. Try to really get an understanding of what is going on in the TLB, the Page Table, and Physical Memory at each step. Make sure you can answer the following questions:

Once you have reached the end of the simulation note the number of TLB Hits and Misses and Page Hits and Faults. Did you have any Page Hits? Why or why not?

Check-off

Exercise 2: Custom Access Patterns (CAMERA)

Now that you've seen what a random workload looks like in the VM system, let's try creating custom workloads with specific properties:

  1. Create a workload of 10 memory accesses that will cause 10 TLB misses and 10 page faults.
  2. Create a workload such that the 5th page fault replaces the page in frame 2 of physical memory. Physical memory (and the TLB) are using a LRU replacement policy.

You should be able to come up with these workloads on paper, but then you should run it in Camera to verify your work. You can specify a custom workload in Camera by clicking the button labeled "Self Generate Add. Ref. Str." and entering in the addresses you want to reference one at a time. When you are satisfied that you've got valid sequences, write them down!

Check-off

Exercise 3: Memory Systems Engineering (CAMERA)

Let's be more explicit about how the VM parameters affect performance. Make a copy of the table below (print or draw from scratch). Each row has a different VM parameter. Place a check mark in each column of that row if that parameter affects the property listed above it. Be prepared to explain your reasoning for each of these.

Feel free to discuss with others in lab as this can be a very confusing topic!

VM Parameter Virtual
Addresses
Physical
Addresses
TLB entry
width
PT entry
width
max # valid
entries in TLB
max # valid
entries in PT
# PT entries
Page Size        
PM Size        
VM Size        
TLB Size        
TLB Replacement
Policy
       
PM Replacement
Policy
       

Given your sequence of memory accesses from the first part of Exercise 2, can you find a change to a single parameter that would result in the same number (ten) of TLB misses but result in fewer than ten page faults?

Check-off

Exercise 4: Putting it all in Context (VMSIM)

VMSIM is a virtual memory simulator located here: http://www.cs.gmu.edu/cne/workbenches/vmsim/vm.html.

Go to the VMSIM website and inspect the VMSIM applet. What is different about the setup of this simulation as compared to CAMERA? In particular, what are P1, P2, P3, and P4? If you watch closely you'll see that this simulation reports a much higher percentage of TLB misses than the random run on CAMERA did. Why might this be?

Check-off