CS 61C		Homework 11

Because this was posted late, it's optional.

1.  P&H ex. 7.32, 7.33

2.  In a memory hierarchy like that of Figure 7.25 (page 593) that
includes as TLB and a cache organized as shown, a memory reference
can encounter three different types of misses: a cache miss, a TLB
miss, and a page fault.  Consider all the combinations of these
three events with one or more occurring (seven possibilities).
For each possibility, state whether this event can actually occur
and under what circumstances.