CS 61C Great Ideas in Computer Architecture (Machine Structures). Fall 2014, UC Berkeley
P&HK&RWSC  
CS61C Fall 2014
MWF 3-4pm 150 Wheeler





Timely Announcements

2014-08-20 Welcome to CS61C Fall 2014!

Some important announcements will be placed here and many will be made on Piazza. Please check both often, as content will be updated frequently.

2014-08-27 First Week Labs

There will be labs during the first week of instruction. If you have a Wednesday lab, stay tuned for more information - you will need to attend a lab on Thursday or Friday for the first week. See Piazza for more information.

2014-08-31 Grading Breakdown

For future reference, the grade breakdown for the course is summarized here. The grading scale is available here.




Lecture, Reading, and Assignment Calendar

Policy on Assignments and Independent Work. Unless explicitly stated otherwise, all homeworks and projects are to be YOUR work and your work ALONE. Collaboration in CS61C is limited to debugging. You should not discuss ideas/approaches or pseudocode with other students. What you hand in must be entirely your own work. It is NOT acceptable to copy solutions from other students or to copy (or start your) solutions from the Web. We have tools and methods, developed over many years, for detecting this. You WILL be caught, and the penalties WILL be severe. These include, at minimum:

  • A letter to your university record documenting the incidence of cheating.
  • An automatic F in the course for both you and the enabler/giver of the assignment.
Both the giver and receiver are equally culpable and suffer equal penalties. The full policy on collaboration is available here.

Wk Date Lecture Topic Reading Section Lab Assignment Due
1
08/29 F Course Intro: Great Ideas in Computer Architecture (Dan/Miki) None None Lab 0: Introductions HW0: Introduce Yourself
Due Next Week in Lab (ie. 09/{3, 4, 5})
2
09/01 M Administrative Holiday (Labor Day) Section 0: Number Representation Lab 1: Number Representation
HW1: C and Number Rep
Due 09/07 @ 23:59:59
09/03 W Number Representation (Dan) (4th) P&H: 2.4
(5th) P&H: 2.4
Binary slides
09/05 F C Intro: Basics (Dan) B. Harvey's Intro to C
K&R Ch. 1-4
3
09/08 M C Intro: Pointers, Arrays, Strings (Dan) K&R Ch. 5-6
C Reference Slides
Section 1: C Basics Lab 2: C
HW2: rgrep
Due 09/14 @ 23:59:59
09/10 W MIPS Intro (Miki) (4th) P&H: 2.1-2.3
(5th) P&H: 2.1-2.3
09/12 F MIPS lw, sw, Decisions I (Miki) (4th) P&H: 2.9, 2.10 (only p.128-129)
(5th) P&H: 2.9, 2.10 (only p.111-113)
4
09/15 M MIPS Decisions II (Miki) (4th) P&H: 2.6, 2.7, 3.2
(5th) P&H: 2.6, 2.7, 3.2
Section 2: MIPS Lab 3: C Pointers and GDB
HW3 Part 1: MIPS
Due 09/17 @ 23:59:59
09/17 W MIPS Instruction Format I (Miki) (4th) P&H: 2.5, 2.10
(5th) P&H: 2.5, 2.10
09/19 F MIPS Instruction Format II (Miki) Bonus Slides Project 1: C and MIPS
Part 1 Due 09/24 @ 23:59:59
Part 2 Due 10/01 @ 23:59:59
5
09/22 M MIPS Procedures I (Dan) (4th) P&H: 2.8 (p. 112-118)
(5th) P&H: 2.8 (p. 96-102)
Section 3: MIPS Control Flow and Instruction Formats Lab 4: Memory Management and Assembly Practice
09/24 W MIPS Procedures II & Logic Ops (Dan) (4th) P&H: 2.8, B.6
(5th) P&H: 2.8, A.6
Bonus slides
09/26 F Caches I (Miki) (4th) P&H: 5.1
(5th) P&H: 5.1, 5.2
6
09/29 M Caches II (Miki) (4th) P&H: 5.2 (p. 457-470)
(5th) P&H: 5.3
Section 4: MIPS Procedures Lab 5: Function Calls and Pointers in MIPS
10/01 W Caches III (Miki) (4th) P&H: 1.4, 5.3, 5.5
(5th) P&H: 1.6, 5.4, 5.8
Cache Flowchart
10/03 F Floating Point (Dan) (4th) P&H: 3.5, 3.8
(5th) P&H: 3.5. 3.9
IEEE 754 Simulator
HW3 Part 2: FP, Caches
Due 10/05 @ 23:59:59
10/04 Sa 1-4pm, 2050 VLSB: HKN Midterm Review Session
10/05 Su 1-3pm, 2050 VLSB: TA Midterm Part 1 Review Session
7
10/06 M Compilation, Assembly, Linking, and Loading (Dan) (4th) P&H: 2.12, B.1-B.4
(5th) P&H: 2.12, A.1-A.4
Section 5: Caches Lab 6: Cache Blocking
[MT Studying]
10/08 W Datacenters and Cloud Computing (Dan) Warehouse-Scale Computers: Ch 1, Ch 3, 5.1-5.3
10/10 F Midterm Part 1 (in-class)
10/10 F 4-5pm, Wheeler Auditorium: Midterm Part 1 Walkthrough (optional)
10/12 Su 1-3pm, 155 Dwinelle: TA Midterm Part 2 Review Session
8
10/13 M MapReduce (Dan) Warehouse-Scale Computers: Ch 2.4 Section 6: Floating Point, C.A.L.L. Lab 7: MapReduce, Hadoop, and Spark
[MT Studying]
10/15 W Flynn Taxonomy, Intel SIMD Instructions (Miki) (4th) P&H: 1.5, 1.6, 7.1, 7.2, 7.4, 7.6
(5th) P&H: 1.7, 1.8, 6.1, 6.2, 6.3, 6.7
10/17 F Midterm Part 2 (in-class)
10/17 F 4-5pm, Wheeler Auditorium: Midterm Part 2 Walkthrough (optional)
9
10/20 M Intel SIMD Continued, Thread Level Parallelism (Miki) (4th) P&H: 7.3, 5.8
(5th) P&H: 6.5, 5.10
Section 7: MapReduce and WSC Lab 8: Intel SIMD
Project 2: MapReduce
Part 1 Due 10/27 @ 23:59:59
Part 2 Due 11/02 @ 23:59:59
10/22 W Thread Level Parallelism (Miki) (4th) P&H: 2.11
(5th) P&H: 2.11
10/24 F Thread Level Parallelism, OpenMP (Miki) OpenMP summary card
10
10/27 M Intro to Synchronous Digital Systems (Miki) SDS Handout Section 8: Cache Coherence and Synchronization Lab 9: Thread Parallelism
10/29 W State and State Machines (Dan) (4th) P&H: 4.2, C.3-C.6 (on CD)
(5th) P&H: 4.2, B.3-B.6
State Handout
10/31 F Combinational Logic (Dan) (4th) P&H: C.2-C.3 (on CD)
(5th) P&H: B.2-B.3
Logic Handout
11
11/03 M Combinational Logic Blocks (Dan) Blocks Handout Section 9: Logic and SDS Lab 10: Logisim
HW4: Digital Design and FSMs
Due 11/09 @ 23:59:59
11/05 W Single Cycle CPU Datapath (Shreyas) (4th) P&H: 4.1, 4.3
(5th) P&H: 4.1, 4.3
11/07 F Single Cycle CPU Control (Sagar) (4th) P&H: 4.4
(5th) P&H: 4.4
12
11/10 M Single Cycle CPU Control II (Miki) (4th) P&H: 4.5, 4.6
(5th) P&H: 4.5, 4.6
Section 10: Single Cycle Datapath Lab 11: More Logisim
Project 3: Performance Optimization
Part 1 Due 11/16 @ 23:59:59
Part 2 Due 11/23 @ 23:59:59
11/12 W ILP: Pipelining (Dan) (4th) P&H: 4.7, 4.8
(5th) P&H: 4.7, 4.8
11/14 F ILP: Pipelining Hazards (Dan) (4th) P&H: 4.10, 4.11
(5th) P&H: 4.10, 4.11
13
11/17 M ILP: Multiple Instruction Issue (Dan) (4th) P&H: 5.4
(5th) P&H: 5.7
Section 11: Pipelining Lab 12: Project 4 Prelude
11/19 W Virtual Memory I (Miki) (4th) P&H: 5.10-5.12
(5th) P&H: 5.13, 5.15, 5.16
11/21 F Virtual Memory II (Miki) None
14
11/24 M Virtual Memory III (Miki) (4th) P&H: 6.1, 6.5
(5th) P&H: 6.9 (only p.1-4)
Section 12: Virtual Memory Lab: TBD Project 4: Processor
Due 12/07 @ 23:59:59
11/26 W I/O: Basics (Dan) (4th) P&H: 6.6, 4.9
(5th) P&H: 6.9 (only p.4-10), 4.9
11/28 F Administrative Holiday (Thanksgiving)
15
12/01 M I/O: Interrupts and Networks (Sagar) TBD Section 13: Virtual Memory II, I/O Lab 13: Virtual Memory
12/03 W I/O: Disks (Dan) (4th) P&H: 6.2-6.4, 6.9
(5th) 5.2, 5.5 (only p.418-419), 5.11
Berkeley RAID Paper
12/05 F Summary and Goodbye (Dan/Miki) None
RRR
TBD Final Exam Review: Time/Location TBD
Finals
12/16 Tu Final Exam: 7:00pm-10:00pm, Location TBD



Office Hours Schedule

Demo 4 - jQuery Week Calendar



Weekly Schedule




Staff

Dan Garcia

Miki Lustig

Instructor: Dan Garcia
ddgarcia@cs
OH: W 10-11am, 777 Soda
Instructor: Miki Lustig
mlustig@eecs
OH: Th 2:30-3:30pm, 506 Cory
Head TA: Sagar Karandikar
skarandikar@berkeley
OH: F 2-3pm, 611 Soda
Head TA: Jeffrey Dong
jefdongus@berkeley
OH: Th 11am-12pm, 283E Soda
TA: Kevin Liston
kmliston@berkeley
OH: Tu 9-10am, 330 Soda
Tu 12-1pm, 283E Soda
 
TA: Roger Chen
rogerhub@berkeley
OH: F 4-6pm 330 Soda
TA: Riyaz Faizullabhoy
riyazdf@berkeley
OH: M 10-11am, 330 Soda
TA: Shreyas Chand
shreyas.chand@berkeley
OH: M 5-6pm, 651 Soda
Tu 2:30-3:30pm, 283E Soda
 
TA: David Adams
dadams@berkeley
OH: M 12-1pm, 283E Soda
Th 10-11am, 651 Soda
TA: Fred Hong
fredhong@berkeley
OH: W 12-2pm, 330 Soda
TA: Andrew Luo
andrewluo_cs61c@outlook.com
OH: W 6-8pm, 611 Soda
 
TA: Rohan Chitnis
ronuchit@berkeley
OH: M 11-12pm, 330 Soda
M 2-3pm, 330 Soda
TA: Matthew Griffin
mattgriffin94@yahoo.com
OH: Tu 4-5pm, 283E Soda
W 4-5pm, 283E Soda
TA: William Huang
william.huang@berkeley
OH: W 9-10am, 330 Soda
W 2-3pm, 330 Soda
 
TA: Jay Patel
patel.jay@berkeley
OH: Tu 1-2pm, 283E Soda
Th 1-2pm, 283E Soda
TA: Alexander Chou
chou.alexander@berkeley
OH: M 4-5pm, 504 Cory
 

If you have a question, here are the ways to get an answer, rated from best to worst:

  1. Search for the answer yourself.  Far too often students ask a question whose answer is available on this very page or on the top of assignment handouts.
  2. Ask a fellow classmate.
  3. Look for your question on Piazza, then ask a new one if necessary.
  4. Ask your TA during discussion section, lab, or office hours.
  5. Ask Dan in office hours.
  6. Ask Dan in lecture.
  7. Send your TA email.
  8. Send Dan e-mail. Note that this is by far the worst way to ask a question. E-mail as a communications medium simply does not scale to ~400 students.

Readers

Name Grading Accounts E-mail
Nolan Lum Two letter: cs61c-aa -> cs61c-eq cs61c-ri@imail.eecs.berkeley.edu
Xinghua Dou Two letter: cs61c-er -> cs61c-ig xinghuadou@berkeley.edu
Harrison Wang Two letter: cs61c-ii -> cs61c-lp, Three letter: cs61c-aaa -> cs61c-adj h.wang94@berkeley.edu
Ryoko Janlie Three letter: cs61c-adk -> cs61c-ago ryoko.janlie@berkeley.edu
Dasheng Chen Three letter: cs61c-agp -> cs61c-ano dasheng@berkeley.edu
Christopher Hsu Three letter: cs61c-anp -> cs61c-avm chrishsu@berkeley.edu
Jonathan Eng Three letter: cs61c-avn -> cs61c-azz jonathan.eng@berkeley.edu



Resources and Handouts

Reference card for GDB version 5:  (pdf | ps | dvi)
Harvey notes on C:  (pdf)
Hilfinger notes on Memory Management:  (pdf)
MIPS Green Sheet:  (pdf)
MIPS Helper Sheet:  (html)
Floating Point Java Demos:  (html)

P&H We will be using the fifth edition of Patterson and Hennessy's Computer Organization and Design book ("P&H"), ISBN 0124077269.
K&R We are also requiring The C Programming Language, Second Edition by Kernighan and Ritchie ("K&R"), and will reference its sections in the reading assignments. Other books are also suitable if you are already comfortable with them, but our lectures will be based on K&R.
WSC Finally, we will be using The Datacenter as a Computer: An Introduction to the Design of Warehouse-Scale Machines ("WSC"), which is freely available online here.

The subjects covered in this course include: C and assembly language programming, how higher level programs are translated into machine language, computer organization, caches, performance measurement, parallelism, CPU design, warehouse-scale computing, and related topics. The only prerequisite is that you have taken CS61B, or at least have solid experience with a C-based programming language.


PiazzaThe course discussion forum is hosted by Piazza. We will use this for asking and answering questions and making announcements.




CS Illustrated

Illustrations by Ketrina Yim (csillustrated.berkeley.edu)
Number
Representations:
Integer Representations Comparing Integer Representations Comparing Integer Representations 2 Comparing Integer Representations 3
Floating Point
Numbers:
Floating Point Floating Point Interpretations Floating Point Number Line
Caches: Caching Overview Cache Misses Cache Associativity
Pointers and
Arrays:
Pointers and Arrays

CS61C, http://inst.eecs.berkeley.edu/~cs61c/ (Last Updated: 2014-09-16 @ 14:47)