Four questions, submit as "quiz31". Due 2:45pm before lecture 11/14/2007.
For the first two questions, consider a reference (load or store) to memory location 53, on a byte-addressable 32bit computer like the MIPS.
Assume the cache is eight-word direct-mapped.
1.
In which cache location will the contents on memory location 53 be stored? Answer using Verilog constant syntax, and be sure to
include the bit-width of the cache location address.
2.
What are the contents of the tag field for the above mentioned memory location? Answer using Verilog constant syntax, and
be sure to include the bit-width of the cache tag.
For the next two questions, we will consider a processor which has been designed to use either WriteThrough or WriteBack
caching as controlled by software. Your answers should be wt or wb as appropriate.
3.
For a piece of software which makes many memory references, which cache policy should be used? Please explain very briefly.
4.
If the same piece of software is running a nuclear reactor, wherein data integrity is vital, which cache policy should be used?
Please explain very briefly, particularly why this answer is the same as or different from the previous one.