CS 61C (Fall 2007)

Quiz 27

Two questions, submit as "quiz27". Due 2:45pm before lecture 11/2/2007.

1.

How many additional multiplexors would need to be added to Figure 5.24 to implement jal? Note that adding an extra input to a mux is equivalent to adding an extra mux. Explain very very briefly which signals would be multiplexed and what the control should be.

2.

Given the delay's on page 315 of P&H, what are the names of the modules on the critical path of Figure 5.24? The critical path in a circuit is the combinational path, from one register's output to another (or the same) register's input, with the longest delay. Keep in mind that there are only two registers in this design: the PC and the Registers, therefor your path must start at one or the other of those, and end at one or the other. Do not include any modules with a delay of 0ps, e.g. any muxes, control, sign extension or wires. You may need include a PC access, if that is the start or end of the path.

As an example, cast your mind back to Lab9 Exercise4, where the critical path through your Accumulator4 module would have been Register4, Add4, Register4. This includes the read from the register, the addition and then the write back to the register.