Welcome to the web page for Spring 2014 CS252 Graduate Computer Architecture. CS252 provides essential background for students intending to pursue research in computer architecture or related fields, and also provides preparation for the Berkeley EECS computer architecture oral prelim examination.
The class explores: the major architectural design patterns, including microcoding, pipelining, decoupling, in-order and out-of-order superscalars, vector/SIMD/GPUs, VLIW, multithreading, shared-memory multiprocessors, message-passing multicomputers; protection, security, virtual memory and virtual machines; networking and storage architectures; resiliency to hard and soft errors; power, energy, and thermal issues; evaluation methodologies. These concepts will be explored in the context set by the historical and predicted future trajectory of applications, technology, programming models, and business models.
The prerequisite for the class is CS152 or an equivalent upper division computer architecture course.
Date | Lecture | Background Readings | Assignments (Paper Reviews due by 10:30AM) |
Wed Jan 22 | L1: Introduction, Class Organization PPTX PDF | ||
Mon Jan 27 | L2: Instruction Set Architectures PPTX PDF | H&P App. A |
"Design
of the B5000 System", Lonergan, King, 1961
"Architecture of the IBM System/360", Amdahl, Blaauw, Brooks, 1964 |
Wed Jan 29 | L3: From CISC to RISC PPTX PDF |
"The
Case for the Reduced Instruction Set Computer",
Patterson, Ditzel, 1980
Comments on the "The Case for the RISC", Clark, Strecker, 1980 "Performance from architecture: comparing a RISC and CISC with similar hardware organization", Bhandarkar, Clark, 1991 |
|
Mon Feb 3 | L4: Pipelining PPTX PDF | H&P App. C |
"Parallel
Operation in the Control Data 6600", Thornton, Proceedings of
the Fall Joint Computers Conference, vol 26, pp. 33-40, 1964
"IBM's Single-Processor Supercomputer Efforts", Smotherman, Spicer, CACM, 53(1), 2010 "Implementation of Precise Interrupts in Pipelined Processors", Smith, Pleszkun, ISCA, 1985 (IEEE Trans. Computer Journal version) |
Wed Feb 5 | Lecture cancelled | ||
Mon Feb 10 | No Lecture: ISSCC | ||
Wed Feb 12 | L5: Early Out-of-Order Processing PPTX PDF | H&P Ch. 3.1-3.6 |
"An Efficient Algorithm for Exploiting Multiple Arithmetic units", Tomasulo, IBM Journal, January 1967 "Decoupled Access/Execute Computer Architectures", Smith, ISCA 1982 (ACM TOCS version) |
Mon Feb 17 | No lecture: President's Day Holiday | ||
Wed Feb 19 | Guest Lecture: Fredrico Faggin, "Microelectronics & Microprocessors: The Early Years" | Room Change: Special class will be held in Cory 540A/B | |
Mon Feb 24 | L6: Modern Out-of-Order Processors PPTX PDF | H&P Ch. 3.8-3.11, 3.13 |
"Combining
Branch Predictors", McFarling, DEC WRL Technical Note TN-36,
1993 "The MIPS R10000 Superscalar microprocessor", Yeager, IEEE Micro 16(2), 1996 |
Wed Feb 26 | L7: Branch Prediction and Load-Store Queue Designs PPTX PDF |
"The Transmeta
Code Morphing Software", Dehnert et al., CGO 2003 "Intel's Haswell CPU Microarchitecture", David Kanter, Realworld Tech, 2012 |
|
Mon Mar 3 | L8: Vector Supercomputers PPTX PDF | H&P App. G |
"The CRAY-1 Computer System", Russel, CACM 1978 "The Cray Black Widow", Abts et al., Supercomputing 2007 |
Wed Mar 5 | L9: VLIW Machines PPTX PDF | H&P Ch. 3.7, App. H |
"Very Long Instruction Word Architectures and the
ELI-512", Fisher, ISCA 1983 "A VLIW Architecture for a Trace Scheduling Compiler", Colwell et al., IEEE Trans. Computers, 1988 |
Mon Mar 10 | L10: Memory PPTX PDF | H&P Ch. 2.3, App. B.1-B.3 |
"Understanding
the Energy Consumption of Dynamic Random Access
Memories", Vogelsang, MICRO-2010. "Hybrid Memory Cube", Pawlowski, slide presentation, HotChips 2011. |
Wed Mar 12 | L11: Cache coherence PPTX PDF | H&P Ch. 5.1-5.4 |
"The SGI Origin: a
ccNUMA highly scalable server", Laudon, Lenoski, ISCA 1997
"IBM POWER7 multicore server processor", Sinharoy et al., IBM J. R&D, 2011 |
Mon Mar 17 | L12: Synchronization and Memory models PPTX PDF | H&P Ch. 5.5-5.8 |
"Shared Memory
Consistency Models: A Tutorial", Adve, Gharachorloo, DEC WRL TR, 1995 Project proposal due by 11:59PM. |
Wed Mar 19 | L13: Multithreading PPTX PDF | H&P Ch. 3.12 |
"The Tera
Computer System"Alverson et al, ICS 1990 "Exploiting choice: instruction fetch and issue on an implementable simultaneous multithreading processor", Tullsen et al., ISCA 1996 |
Mon Mar 24 | No lecture: Spring Break | ||
Wed Mar 26 | No lecture: Spring Break | ||
Mon Mar 31 | L14: Address Translation and Protection PPTX PDF | H&P Ch. 2.4-2.7 |
No paper readings. Prepare for midterm! |
Wed Apr 2 | Midterm Exam | No paper readings | |
Mon Apr 7 | Individual group project meetings | No paper readings | |
Wed Apr 9 | Individual group project meetings | No paper readings | |
Mon Apr 14 | L15: Virtual Memory and Caches PPTX PDF |
"Survey
of Virtual Machine Research", Goldberg, IEEE Computer,
1974 "Bringing Virtualization to the x86 Architecture with the Original VMware Workstation", Bugnion et al., ACM TOCS, November 2012 |
|
Wed Apr 16 | L16: Virtual Machines PPTX PDF | No additional readings. | |
Mon Apr 21 | L17: I/O PPTX PDF |
"On the Design of Display Processors", Myer, Sutherland, CACM 1968. "A Case for Redundant Arrays of Inexpensive Disks (RAID)", Patterson, Gibson, Katz, SIGMOD 1988 |
|
Wed Apr 23 | No lecture - work on projects | ||
Mon Apr 28 | Individual group project meetings | No paper readings | |
Wed Apr 30 | Individual group project meetings | No paper readings | |
Wed May 7 | Final Project Presentations | All day 11AM-3PM 320 Soda | |
Fri May 9 | Final Project Paper | Due 11:59PM |
This page uses the Holy Grail Liquid-Layout: No quirks mode by Matthew James Taylor.