The report template will be important in the group labs, so feel free to modify some things as you feel necessary for the first few labs. However, the easier your report is to grade, the higher your score will probably be!
This template serves as a guideline for all project/lab reports in general. Some labs (i.e., Labs 1-2) might not need all of the report sections, so use your best judgment. The style of the report should be very direct and concise. Wordiness will result in LOWER grades!
This section summarizes the goal of your lab/project, gives a brief overview of the motivation behind what you are doing, and what key issue is being addressed. Include a brief description of what have you achieved, what are the final results, and what method you use to implement it. The abstract should be no more than one or two paragraphs.
Division of Labor: (for group projects/labs only)
The first objective of this section is to break the problem into its primary components. This includes both implementation and verification. After a clear and concise summary of the main areas, give a breakdown of who is responsible for what.
Explain in detail the following: how you have implemented the system, what strategies were used, what major decisions were made and why, and what are the trade-offs. When necessary, show a simplified block diagram representation of the system, and pseudo-code or RTL to explain the control algorithms or FSMs. For verification, describe the different aspects of the system you are verifying and have a clear method of showing how your diagnostic programs accomplish this. Make this section clear! Use diagrams, charts, and tables as necessary. When referencing VHDL code or schematics, clearly reference (preferably with hyperlinks) the corresponding documents in the appendix. Do NOT paste large graphs directly into the report. Also make sure you answer all the questions included in the assignment.
First, provide a high level summary of the results (i.e., clock cycle, critical path, and the instruction that excites that critical path). If applicable, show a simplified block diagram of your processor and highlight the critical path. Talk about the performance gained through your optimizations or modifications.
Second, include concise calculations for all performance analysis to support the claims made above. Ideally, you should also prove and demonstrate the failure mode of your processor when it runs slightly faster than your calculated maximum clock speed. Explain the performance metrics you use and how good they are in terms of simulating real world applications. Include any conditions or limitations of the results.
Reflect on your project and include any remarks on weaknesses and strengths as well as possible future modifications if given more time and resources. Comment on the areas that gave you the most difficulty, and explain the errors in functionality if there are any.
Appendix I (notebooks):
Notebooks for each member, each of which must include their name and total hours spent on the assignment.
Appendix II (schematics):
In hierarchal order, include and preferably hyperlink ALL schematics in some common format (i.e. not the Workview schematic itself).
Appendix III (Verilog files):
Include and preferably hyperlink Verilog source code for ALL components used.
Appendix IV (testing):
Include ALL test code and simulation log files proving the functionality of the system.