UC Berkeley CS150

Grading

• 35% Project
• 25% Final Exam
• 10% Midterm 1
• 10% Midterm 2
• 10% Homework
• 5% Labs
• 5% Participation

Textbook

This course has one required text: Digital Design and Computer Architecture, by Harris & Harris.

Course Goals

• Understand the principles and methodology of digital logic design at the gate and switch level, including both combinational and sequential logic elements.
• Gain experience developing a relatively large and complex digital system.
• Gain experience with modern computer-aided design tools for digital logic design.
• Understand clocking methodologies used to control the flow of information and manage circuit state.
• Appreciate methods for specifying digital logic, as well as the process by which a high-level specification of a circuit is synthesized into logic networks.
• Appreciate the tradeoffs between hardware and software implementations of a given function.
• Appreciate the uses and capabilities of a modern FPGA platform.

Policies

• All lab assignments, including project checkpoints must be completed by the beginning of your assigned lab section on the week due. You must be ready to meet with the TAs for evaluation at the beginning of lab.
• All reading assignments are to be completed by the lecture they are assigned for.
• There is no late policy - late assigments are not accepted. The course material and project work in CS150 builds on itself, so be careful not to fall behind. Catching up is extremely difficult, especially as other coursework picks up mid-semester.
• The project is a joint effort between you and your partner. You must contact both your partner and the course staff if dropping the course.
• Homework is due Thursday 2:10pm (before lecture) and on paper unless announced otherwise.
• You are expected to check the course website daily for assignments and announcements.
• For all re-grades, submit a written request to the professor. All submissions are re-graded in their entirety, potentially resulting in a lower overall score.

Academic Honesty

Cheating will not be tolerated. See here for details.

Lab & Discussion Sections

You are free to choose which discussion section(s) you attend. They are offered strictly for your benefit.

You are required to be present at the beginning of your lab section to be checked off. Please attend the same lab section every week. You will need to be present in the same lab as your partner during the project. We require no formal procesure for switching lab sections, but we may have to change this policy if any single lab becomes overcrowded.

Course Communications

We will be communicating with you almost exclusively through piazzza this semester. Please make sure you have a working account associated with the CS150 class.