For your design to be considered functionally complete, you need to be able to do the following:
In order to verify the operation of your processor and memory hierarchy, and measure its performance, you will be required to run several benchmarks programs on your processor. These each do some computationally intensive task and print both a result (to verify the correctness of your processor) and the number of cycles it took to do the computation to the UART. In order to accurately measure the cycle count we have to introduce one last bit of new hardware.
In order to accurately benchmark your CPU design we have to add a dedicated
cycle counter in to the memory map. This is simply a 32-bit accumulator that
increases by one every cycle. In addition, the CPU can write a word in the
register in order to reset it. The cycle counter should be mapped in to memory
at address 0x80000020.
A portion of your grade will be based on the optimality of your design. This
includes both performance (instructions / second as measured by the benchmarks)
and resource utilization. Benchmarks are located in software/bmarks. More
benchmarks and target numbers for performance will be released shortly.
For the final checkoff, please tag a git commit with final. Additionally, we
will have you show your working design to us during lab hours. Checkoffs
completed during RRR week will be rewarded with a small amount of extra credit.
Please email the staff if you plan to check off early.