| EECS150 Components and Design Techniques for Digital Systems | |
|
EECS150 Spring 2009 Documents |
|
Home | Old News | Calendar | Grades | Grading Status | Project Status | Documents | Staff | Syllabus | Schedule | Old Websites | Links | TA |
|
| Sections... |
| Pictures + Accumulated Information | |
| [ZIP] | Visio Stencils for block diagrams |
| [ZIP] | The whiteboard with notes on Lab2 |
| [PDF] | Information about the midterm |
| [PDF] | Midterm review sheet (6-7pm; Ilia) |
| [PDF] | Midterm review sheet (7-8pm; Chris) |
| [PDF] | Spring 2005 Midterm 1 |
| [PDF] | Spring 2005 Midterm 1 (Solutions) |
| [PDF] | Spring 2005 Midterm 2 |
| [PDF] | Spring 2005 Midterm 2 (Solutions) |
| [PDF] | Spring 2009 Midterm |
| [PDF] | Spring 2009 Midterm (Solutions) |
| [PDF] | Example Project Report #1 |
| [PDF] | Example Project Report #2 |
| [PDF] | Midterm review sheet (6-7:30pm; Chris) |
| Tutorials | |
| [PDF] | Verilog always@ block Tutorial |
| [PDF] | Verilog wire vs. reg Tutorial |
| [PDF] | Verilog "Finite State Machines" Tutorial |
| [PDF] | ChipScope tutorial |
| [PDF] | SVN tutorial |
| [PDF] | Modelsim tutorial |
| Top Level Verilog Files | |
| FPGA_TOP_ML505.v | Top level interface from a Xilinx XC5VLX110T FPGA to the ML505 LX110T Board respectively. |
| Const.v | Macro support file that is required to be in the same directory as your .ise project when you use FPGA_TOP_ML505.v. |
| General Documentation | |
| [HTML] | Kramnik (Terminal Server) Instructions |
| [PDF] | Synplicity Synplify Reference |
| [PDF] | HP/Agilent 54645D Oscilloscope Tutorial |
| Virtex-5 FPGA Documentation | |
| [PDF] | Xilinx Virtex-5 Family Overview |
| [PDF] | Xilinx Virtex-5 FPGA User Guide |
| [PDF] | Xilinx Virtex-5 Libraries Guide for HDL Designs |
| [PDF] | Xilinx Virtex-5 FPGA System Monitor |
| [PDF] | Xilinx Virtex-5 FPGA XtremeDSP Design Considerations |
| [PDF] | Xilinx Virtex-5 FPGA Packaging and Pinout Specification |
| XUPv5/ML505 Board Documentation | |
| [PDF] | ML505/ML506/ML507 Evaluation Platform User Guide |
| [PDF] | ML505/ML506/ML507 Schematics |
| [PDF] | System ACE CompactFlash Solution |
| [PDF] | AD1981A Audio Codec |
| [PDF] | CH7301C DVI Transmitter Device |
| [PDF] | DVI Encoder Registers Read/Write Operation |
| [PDF] | LCD High-level schematic |
| [PDF] | M25P32 Serial Flash Memory |
| [PDF] | ZBT synchronous SRAM |
| [PDF] | Numonyx StrataFlash Embedded Memory |
| [PDF] | Platform Flash In-System Programmable Configuration PROMS |
| Protocols and Standards | |
| AC97 Audio | |
| I2C Bus Specification | |
| 802.3 Ethernet (part 1) | |
| 802.3 Ethernet (part 2) | |
| 802.3 Ethernet (part 3) | |
| 802.3 Ethernet (part 4) | |
| 802.3 Ethernet (part 5) | |
| RS-232 | |
| Last Updated: 05/12/2009 by | |
| Chris Fletcher |