EECS150 Components and Design Techniques for Digital Systems

EECS150 Spring 2004
 

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Week

Day

Topic

Homework

Lab

1

20 Jan

Course Administration
Logic Review: The Many Representations of Hardware [PDF] [Real]
Readings: K&B, Ch. 1; pp. 1-27

No Homework

Lec #1: Instrumentation [PDF] [X]

22 Jan

Transistor and Gate Logic [PDF] [X]
Readings: K&B, Sec. 2.1, 2.3, 2.4; pp. 34-37, 46-66

2

27 Jan

Combinational Logic [PDF] [X]
Readings: K&B, Sec. 2.6, 3.5; pp. 77-81, 131-134

HW #1 [PDF]
(Fri, Jan 30 @ noon)
Solution [PDF] [ZIP]

Lab #1: Instrumentation [ZIP]

Lec #2: Cad Tool Flow [PDF] [X]

Lab Demo: [X]

29 Jan

Programmable Logic: PAL/PLA and FPGA [PDF] [X]
Readings: K&B, Sec. 4.1, 4.2, 4.3; pp. 157-209

3

3 Feb

Verilog Hardware Description Language [PDF] [X]
Readings: K&B, Sec. 3.6; pp. 143-148

HW #2 [PDF]
(Fri, Feb 6 @ noon)
Solution [ZIP]

Lab #2: Cad Tool Flow [ZIP]

Lec #3: Verilog Simulation [PDF] [X]

5 Feb

Basic Finite State Machines: Flip-Flops, Registers, Shifters, Counters [PDF] [X]
Readings: K&B, Sec. 6.1, 6.2.1-6.2.3, 6.3, 7.1; pp. 261-300, 310-324

4

10 Feb

Moore and Mealy Machines [PDF] [X]
Readings: K&B, Sec. 7.2, 7.3; pp. 324-342

HW #3 [PDF]
(Fri, Feb 13 @ 2pm)
Solution [PDF]

Lab #3: Verilog Simulation [ZIP]

Lec #4: Verilog Synthesis [PDF] [X]

12 Feb

FSM Synthesis, State Machine Timing [PDF] [X]
Readings: K&B, Sec. 6.2, 7.4, 9.1, 9.2; pp. 280-285, 342-350, 409-417

5

17 Feb

Midterm I Review [PDF] [X (Review in the lab, 125Cory @ 6-8pm)

No Homework
Study for Midterm

Lab #4: Verilog Synthesis [ZIP]

Lec #5: Debugging [PDF] [X]

19 Feb

Midterm I (Info: [PDF], Solution: [ZIP], Grade Distribution: [PDF])

6

24 Feb

Case Study: SDRAM/Memory Controller [PDF] [X]
Readings: K&B, Sec. 10.4, 10.6; pp. 474-490, 495-508

HW #4 [PDF]
(Fri, Feb 27 @ 2pm)
Solution [PDF] [ZIP]

Lab #5: Debugging [ZIP]

Lec #6: SDRAM Controller, I [PDF] [X]

26 Feb

Project Description: Multimedia Network Router [PDF] [X]
Readings: Project specification documents

7

2 Mar

Datapath Building Blocks: Arithmetic Units, Register Files, Shifters, FIFOs, Memories [PDF] [X]
Readings: K&B, Sec.5.5-5.7, 6.3, 6.4; pp. 235-256, 289-299

HW #5 [PDF]
(Fri, Mar 5 @ 2pm)
Solution [PDF] [ZIP]

Ckpt #1: SDRAM Controller (2 weeks) [ZIP]

Lec #7: SDRAM Controller, II [PDF] [X]

4 Mar

Datapath Interconnection: Point-to-Point, Single Bus, Mixed Strategy [PDF] [X]
Readings: K&B, Ch. 11

8

9 Mar

Datapath Control: State Machines for Control; Register Transfer Abstraction [PDF] [X]
Readings: K&B, Ch. 12

HW #6 [PDF]
(Fri, Mar 12 @ 2pm)
Solution [PDF] [ZIP]

Ckpt #1: SDRAM Controller (Due)

Lec #8: AC97 Control & Audio [PDF] [X]

11 Mar

Datapath Control: Microprogramming [PDF] [X]
Readings: K&B, Ch. 12

9

16 Mar

Control Timing, Pipelining, Re-timing [X]
Readings: K&B, Ch. 12

HW #7 [PDF]
(Fri, Mar 19 @ 2pm)
Solution [PDF]

Ckpt #2: AC97 Controller (2 weeks) [ZIP]

Lec #9: Tips and Techniques [PDF] [X]

18 Mar

Midterm II Review [X]

Spring Break

22-26 Mar

Enjoy Yourselves
(No Solutions Sorry)

10

28 Mar

Midterm II Review [PDF] [X] (in the lab 125Cory @ 4-6pm)

No Homework

Ckpt #2: AC97 Audio (Due)
Solution [ZIP]

Lec #10: Ethernet [PDF] [X]

30 Mar

Midterm II (Info: [PDF], Solution: [PDF], Grade Distribution: [PDF])

1 Apr

Testing, Fault Models, Design for Test [PDF] [X]

11

6 Apr

State Machine Optimization, State Encodings, and State Assignment [PDF] [X]
Readings: K&B, Sec. 7.4, 8.1, 8.2; pp. 342-350, 375-387

HW #8 [PDF]
(Fri, Apr 9 @ 2pm)
Solution [PDF]

Ckpt #3: Ethernet [ZIP]
Demo Solution [ZIP]

Lec #11: SDRAM & Routing [PDF] [X]

8 Apr

State Machines, Signalling, Metastability, Arbiter Design, Hazards [PDF] [X]
Readings: K&B, Sec. 8.3, 8.4; pp. 387-399
Readings: K&B, Sec. 6.2.4, 6.2.5, 3.5.4-3.5.8; pp. 284-289, 134-141

12

13 Apr

Arithmetic Circuits: Building Blocks [PDF] [X]
Readings: K&B, Sec. 5.6, 5.7; pp. 239-252

HW #9 [PDF]
(Fri, Apr 16 @ 2pm)
Solution [ZIP]

Ckpt #4: SDRAM & Routing (2 weeks) [ZIP]
Tester [ZIP]

Lec #12: Routing & Design Integration [PDF] [X]

15 Apr

Arithmetic Circuits: Combinational and Sequential Multiplier [PDF] [X]
Readings: K&B, Sec. 5.8, 10.5; pp. 252-256, 490-495

13

20 Apr

Evolution of FPGA Architectures [PDF] [X]
Readings: K&B, Sec. 9.4, 9.5; pp. 428-454

HW #10 [PDF]
Last Homework
(Fri, Apr 23 @ 2pm)
Solution [PDF]

Ckpt #4: SDRAM & Routing (Due)

Lec #13: Final Checkoff and The Report [PDF] [X]

22 Apr

No Lecture.

14

26 Apr Project Early Checkoff Deadline (Files due @ 10am)

No Homework

Lab: Final Integration and Project Demonstration

27 Apr

Special Topics [X]

29 Apr

Special Topics [PDF] [X]

15

3 May Project Final Checkoff Deadline (Files due @ 10am)

No Homework

Lab: Final Report [DOC]

4 May

CPU Implementation I [X]
Readings: K&B, Ch. 12

6 May

Course Review [PDF] [ X] (Last Class)
IAB Slides [PDF]

7 May

Project Report due @ 4pm in 125 Cory
Movies in the lab @ 8pm

16

12 May Final Review (in the lab 125Cory @ 4-7pm)
(Slides: [PDF], Whiteboard: [ZIP], Video: [X])

14 May

Final Exam, 12:30-3:30 in 10 Evans (BRING 2 BLUE BOOKS )
(Example: [PDF], Example2: [PDF])



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Last Updated: 01/23/2005 by [an error occurred while processing this directive]
Greg Gibeling