EECS 150 Spring 2002:
Design Techniques and Components for Digital Systems

This Week

Announcements

• 5/15/02 - Midterm 3 Results: total 93 points, Stdev 14, Mean 66, Median 69, Max 89, Min 26, Histogram
• 5/14/02 - Midterm 3 will be held on Tuesday, May 14 from 5:30 to 8:30pm in 1 Pimentel.
• 5/13/02 - Solutions to HW8, HW9, and HW12 have been posted.
• 5/10/02 - Please verify your grades with a TA at the Lab before the midterm.
• 5/10/02 - Pictures:
  

  Spring 2002 CS150 class picture (a little out of focus, maybe we will try again at the midterm)	First to Finish the Project: Aman Bhargava
  Best over all project & Most extra credit: Jeng-Wen Chen & Wai Kei So	Most compact design and best wire-wraping: Melinda Ler & James Chang

• 5/9/02 - The Project Kits (the board, discrete components, and the wire wrapping tool) must be returned on Friday from 3 to 5pm in the lab. Remove all wire wrapping from the board.
• 5/9/02 - If you have questions about divider circuits, consider reading section 4.7 Division of the CS61C book (Patterson and Hennessy Computer Organization and Design).
• 5/9/02 - If you have questions about LFSR circuit, take a look at this article.
• 5/8/02 - Midterm 3 review will be held on Monday, May 13 from 5 to 8pm in Woz.
• 5/4/02 - Remember to fill out your Final Project Report Form at least 24 hours before your scheduled check off.
• 5/3/02 - We have posted new (corrected) versions of HW11, Lec24, and Lec25.
  HW11 has corrected RTL for problem 2, and new wording in 2a. Use this correction, not the one discussed in class. Also, you should use the new lecture notes on the CPU core for problem 4 (see below). Due to the late changes, this assignment is now due Friday 5/10. However, there will be another assignment (HW12) due the same date (to be posted over the weekend).
  Lectures 24 and 25 are the lectures from the week of 4/22. Lecture 24 on pipelining has a new chart for the example of pipelining loops with feedback and more information on C-slow. Lecture 25 on the CPU core has revised RTL for every intruction (except beq), a new register (RC) in the datapaths and a new control signal (RCEnb).
• 5/3/02 - final project checkoff starts monday 5/6 check off procedure
• 04/23/02 - A signup sheet for early project grading is posted in the lab near the TA station. Checkoffs will be done in the lab on friday after lab lecture.
• 04/21/02 - Take a look at the project grading standards and procedures. The online report form will be available within several days.
• 04/19/02 - Midterm 2 Solutions
• 04/12/02 - Lab lecture on verilog synthesis ppt, pdf
• 04/10/02 - Midterm 2 Stats: Avg 59.4 Max 93 Min 14 Median 58 STDDEV 24 Histogram
• 04/01/02 - Midterm 1 Solutions
• 04/01/02 - The midterm 2 review is scheduled for Wednesday, April 3 from 8 to 10pm in Wozniak Lounge (4th floor Soda). BRING QUESTIONS!
• 03/25/02 - Here is an outline of topics to be covered by midterm II.
• 03/24/02 - The updated version of Checkpoint 4 (MIDI parser) has been posted.
• 03/20/02 - The Midterm 2 is scheduled for Friday evening, April 5 in 1 Pimentel from 5 to 8pm (square B5 on the campus map)..
• 03/17/02 - The solutions for Quizes 4, 5, and 6 have been posted.
• 03/17/02 - Look at Computer Arithmetic Algorithms Simulator for help with adders and multipliers.
• 03/15/02 - The updated versions of next weeks checkpoints (EPROM and Audio) have been posted. Please start early.
• 03/11/02 - The drafts of all project checkpoints are linked on the calendar page. The data-sheets and wrap-IDs for the parts you will be using are on links page.
• 03/04/02 - We have posted the instructions describing installation process for the Xilinx software.
• 02/28/02 - IEEE Standard Verilog Hardware Description Language has been posted on the reference page.
• 02/27/02 - Midterm1 Stats: Avg 53.8 Max 76 Min 24 Median 55 STD 12.7 Mode 67
  Histogram
• 02/23/02 - The new homework and reading assignment for Week 6 has been posted.
• 02/22/02 - Midterm 1 will be held in 1 Pimentel from 5 to 8pm (square B5 on the campus map).
• 02/21/02 - Additional documentation on verilog, XILINX library and sample verilog files have been posted on Refs/Links page.
• 02/18/02 - Here is an outline of topics to be covered by midterm I.
• 02/18/02 - The midterm 1 review session will be held in Wozniak Lounge (4th floor Soda Hall) on Tuesday, Feb 19 from 8 to 10 pm.
• 02/09/02 - Please keep up with the reading. For Tuesday finish up Mano chapter 2 and read chapter 3 sections 1 through 8. Read section 9 for Thursday.
• 02/06/02 - A new corrected version of the homework #2 handout had been posted. Problem #3 has been corrected.
• 02/03/02 - Starting from Tue Feb 5, 2002, lectures will be held in 60 Evans.
• 02/03/02 - All cs150 lectures are webcast at webcast.berkeley.edu.
• 01/30/02 - Homework 1 is due Fri, Feb 1 before noon. HW Quiz 1 will be held during lab lecture.
• 01/30/02 - Class newsgroup is ucb.class.cs150.
• 01/22/02 - Welcome to EECS 150!

Textbook

Digital Design, Third Edition, by M. Morris Mano Prentice Hall Book WebSite.

Thanks to our Sponsors

• for the new laboratory facility, 125 Cory.
• for development boards and software.