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## Syllabus

### Catalog Description

**CS 150. Components and Design Techniques for
Digital
Systems. (5) **
Three hours of lecture, one hour of discussion, and three
hours of
laboratory per week. Prerequisites: 61C, Electrical Engineering 40 or
42. Basic
building blocks and design methods to contruct synchronous digital
systems.
Alternative representations for digital systems. Bipolar TTL vs. MOS
implementation technologies. Standard logic (SSI, MSI) vs. programmable
logic
(PLD, PGA). Finite state machine design. Digital computer building
blocks as
case studies. Introduction to computer-aided design software. Formal
hardware
laboratories and substantial design project. Informal software
laboratory
periodically throughout semester. (F,SP) Katz, Newton, Pister.
### Course Goals

- Understand digital
logic at the gate and switch level including both combinational and
sequential logic elements.
- Understand
clocking methodologies to manage information flow and preservation of
circuit state.
- Appreciate digital
logic specification methods and the compilation process that transforms
these into logic networks.
- Gain experience
with computer-aided design tools for implementation with programmable
logic devices.
- Appreciate the
advantages/disadvantages between hardware and software implementations
of a function.

### Course Textbook

R. H. Katz, G.
Borriello, *Contemporary Logic Design, 2*^{nd} Ed., Pearson Prentice-Hall, Upper
Saddle
River, NJ, 2005.

Contemporary
Logic Design, Second Edition

### Course Grading

- Homeworks: 10%
- In-class Quizzes:
5%
- Laboratories (Labs
1-5): 15%
- Midterms (2): 20%
- Final Project
(including project Checkpoints 1, 2, 3): 30%
- Final Exam: 20%

#### Project Breakdown

- Checkpoint 1: 10%

- Checkpoint 2: 10%

- Checkpoint 3: 30%

- Checkpoint 4 / Final Checkoff: 30%

- Report: 20%

### Homework and Examination Regrade Policies

- Assignments are
distributed on Wednesday, collected the Friday of the following week at
2:10 pm (before Lab Lecture).
- Expect a short
quiz on the week’s homework at the start of the Wednesday’s lecture for
the week that the homework is due. This is to motivate you to start on
it early and to come to lecture on a regular basis! It is worth 5% of
your final grade.
- Submit assignments
to CS150 homework box next to 125 Cory.
- Homework is graded
on effort, not correctness. Homeworks are worth 10% of your final grade.
- See calendar on
this web page for homework handouts.
- Please attend a
discussion section to hear about the solutions to the exams. This will
usually take place during the week following the return of the exam.
- Regrades are by
written petition only, and in general, we are very stingy with
regrades. The petition should succinctly state why you believe that
your solution is correct when we believed it to be wrong. These should
be dropped in the homework box within one week of the return of the exam
and following the discussion section in which the solutions are
presented. Regrades are considered in batch, to insure consistency.

### Public Discussion

UC Berkeley |
http://www-inst.eecs.berkeley.edu/~cs150/ |
EECS 150 Fall 2005 |