| Calendar [8/29/2004-12/18/2004] |
|---|
| Week |
Date |
Lecture |
Homework |
Lab |
| 1 |
Tue 8/31 |
Lec #1: Course Intro & CS61c/EE40 Review: [PDF] [PPT]
Katz Ch1 |
|
Lec #1: EECS150 Intro & CAD Tools: [PDF] [PPT] [ ] |
| Thr 9/2 |
Lec #2: CMOS Technology: Gates and FlipFlops: [PDF] [PPT]
Katz pp157-170 |
| 2 |
Mon 9/6 |
Labor Day Holiday |
| Tue 9/7 |
Lec #3: Chips to FPGAs, CAD as Fundamental: [PDF] [PPT]
Katz 9.4 & VirtexE Data Sheet pp1-10 |
HW #1: [PDF]
(Due Fri, Sep 10 @ 14:00)
Solution: [PDF] |
Lab #1: CAD Tools: [ZIP] [PDF]
Lec #2: Designing with Verilog: [PDF] [PPT] [] |
| Thr 9/9 |
Lec #4: Hardware Description Languages: [PDF] [PPT]
Verilog Examples, Lab1 Code, IEEE Verilog |
| 3 |
Tue 9/14 |
Lec #5: Boolean Algebra, Truth Tables, Gates, Adder: [PDF] [PPT]
Katz 2.1-2.4 |
HW #2: [PDF]
(Due Fri, Sep 17 @ 14:00)
Solution: [PDF] |
Lab #2: Designing with Verilog: [ZIP] [PDF]
Solution: [ZIP]
Lec #3: Verilog Synthesis & FSMs: [PDF] [PPT] [] |
| Thr 9/16 |
Lec #6: Cannonical Forms and Logic Minimization: [PDF] [PPT]
Katz 2.5-2.7 |
| 4 |
Tue 9/21 |
Lec #7: PLAs and Finite State Machines: [PDF] [PPT]
Katz 1.4.2, 7.1-7.3 and pp174-186 |
HW #3: [PDF]
(Due Fri, Sep 24 @ 14:00)
Solution: [PDF] |
Lab #3: Verilog Synthesis & FSMs: [ZIP] [PDF]
Solution: [ZIP] [BIT]
Lec #4: Debugging: [PDF] [PPT] [] |
| Thr 9/23 |
Lec #8: Using, Modeling and Implementing FSMs: [PDF] [PPT]
Katz 8.1, 8.4, 7.4 (See Also Katz 11) |
| 5 |
Tue 9/28 |
Lec #9: Counters: [PDF] [PPT]
Katz 7.1, 9.1-9.2 |
HW #4: [PDF]
(Due Fri, Oct 1 @ 14:10)
Solution: [PDF] [JPG] |
Lab #4: Debugging: [ZIP] [PDF]
Solution: [ZIP]
Lec #5: Good Design & Network Audio: [PDF] [PPT] [] |
| Thr 9/30 |
Lec #10: Synthesis: [PDF] [PPT]
|
| 6 |
Mon 10/4 |
Midterm I Review (6-8pm in 125 Cory) |
| Tue 10/5 |
Lec #11: Midterm I Review: [PDF] [PPT]
|
HW #5: [PDF]
(Due Fri, Oct 8 @ 14:10)
Solution: [PDF] |
Lab #5: Network Audio: [ZIP] [PDF]
Solution: [ZIP] [BIT]
Lec #6: Checkpoint #1, N64 Interface: [PDF] [PPT] [] |
| Thr 10/7 |
No Lecture |
| Thr 10/7 |
Midterm I (Solution: [PDF], Grade Distribution: [PDF]) |
| 7 |
Tue 10/12 |
Lec #13: Project: [PDF] [PPT]
|
|
Checkpoint #1: N64 Controller: [ZIP] [PDF]
Solution: [ZIP] [BIT]
Lec #7: Checkpoint #2, Digital Video: [PDF] [PPT] [] |
| Thr 10/14 |
Lec #14: Timing: [PDF] [PPT]
Katz 3.5, 6.15-6.23 |
| 8 |
Tue 10/19 |
Lec #15: Memory: Registers, RAM, ROM: [PDF] [PPT]
Katz 10.4.1, BlockRAM Datasheet |
HW #6: [PDF]
(Due Fri, Oct 22 @ 14:10)
Solution: [PDF] |
Checkpoint #2: Video Encoder: [ZIP] [PDF]
Solution: [ZIP] [BIT]
Lec #8: Detailed Project Spec: [PDF] [PPT] [] |
| Thr 10/21 |
Lec #16: Memory: DRAM: [PDF] [PPT]
Katz 10.4.2-10.4.3, SDRAM Datasheet |
| 9 |
Mon 10/25 |
Design Basics Tutorial (5-7pm in 125 Cory) |
| Tue 10/26 |
Lec #17: Addition, Subtraction and Negatives: [PDF] [PPT]
Katz 5.6, Appendix A |
HW #7: [PDF]
(Due Fri, Oct 29 @ 14:10)
Solution: [PDF] |
Checkpoint #2: Video Encoder (Due)
Lec #9: Checkpoint #3, SDRAM PartI: Controller: [PDF] [PPT] [] |
| Thr 10/28 |
Lec #18: Multiplication: [PDF] [PPT]
Katz 5.8 |
| 10 |
Tue 11/2 |
Lec #19: Fixed Point & RTL Design: [PDF] [PPT]
Katz 11.1-11.2 |
HW #8: [PDF]
(Due Fri, Nov 5 @ 14:10)
Solution: [PDF] |
Checkpoint #3: SDRAM Controller: [ZIP] [PDF]
Solution: [ZIP] [BIT]
Lec #10: Checkpoint #3, SDRAM PartII: Arbiter: [PDF] [PPT] [] |
| Thr 11/4 |
Lec #20: Midterm II Review: [PDF] [PPT]
|
| 11 |
Mon 11/8 |
Midterm II Review (5:30-8pm in 125 Cory) |
| Tue 11/9 |
No Lecture |
|
Checkpoint #3: SDRAM Controller (Due)
Lec #11: Checkpoint #4: ZigBee & CC2420 (Extra Credit): [PDF] [PPT] [] |
| Tue 11/9 |
Midterm II (SolutionA: [PDF], SolutionB: [PDF], Grade Distribution: [PDF]) |
| Thr 11/11 |
No Lecture |
| Thr 11/11 |
Vetrans Day Holiday |
| 12 |
Tue 11/16 |
Lec #21: RTL Design Optimization: [PDF] [PPT]
|
HW #9: [PDF]
(Due Mon, Nov 22 @ 14:10)
Solution: [PDF] |
Checkpoint #4: ZigBee & CC2420 (Extra Credit): [ZIP]
Lec #12: Misc (Project): [] |
| Thr 11/18 |
Lec #22: Designing an ISA Interpreter: [PDF] [PPT]
Katz 11.3, 12.1 |
| 13 |
Tue 11/23 |
Lec #23: Coding: [PDF] [PPT]
802.15.4 Specification and CC2420 Datasheet |
|
No Lab Lecture |
| Wed 11/24 |
Final Design Review (Checkoff Sheet: [PDF]) |
| Thr 11/25 |
No Lecture |
| Thr 11/25 |
Thanksgiving Holiday |
| 14 |
Mon 11/29 |
Early Project Checkoff (10am-6pm) (Block Diagram: [PDF], Project: [PDF] [BIT]) |
| Tue 11/30 |
Lec #24: Advanced Sequential Circuits: [PDF] [PPT]
Katz 6.1-6.2 |
HW #10: [PDF]
(Due Fri, Dec 3 @ 14:10)
Solution: [PDF] |
Project: Multiplayer Pong: [PDF]
Solution: [BIT]
Lec #13: Project Report: [PDF] [PPT] [] |
| Thr 12/2 |
Lec #25: Division: [PDF] [PPT]
Katz Appendix A 2.3 |
| 15 |
Mon 12/6 |
Final Project Checkoff (10am-8pm) (Block Diagram: [PDF], Project: [PDF] [BIT]) |
| Tue 12/7 |
Lec #26: CRCs and LFSRs: [PDF] [PPT]
XAPP209 p1-3, A Painless Guide to CRC and Our LFSR Verilog module. |
|
Project: Multiplayer Pong (Due)
No Lab Lecture |
| Thr 12/9 |
Lec #27: Course (Midterm III) Review: [PDF] [PPT]
|
| Fri 12/10 |
Project Report Due (4pm in 125 Cory) (Report Outline: [PDF] [DOC]) |
| 16 |
Mon 12/13 |
Midterm III Review (5-8pm in 125 Cory) |
| Tue 12/14 |
No Lecture |
|
No Lab Lecture |
| Wed 12/15 |
Midterm III (During Final Slot, 12:30pm-3:30pm in 1 LeConte) (Solution: [PDF], Grade Distribution: [PDF]) |
| Thr 12/16 |
No Lecture |
