UC Berkeley CS150 Fall 2013

Announcements

  • 8/25/2013 Piazza CS150


  • Week Date Lecture & Readings Homework Discussion Lab & Project
    1 Thu 8/29

    Lec #1: Course Introduction (Slides)


    2
    Tue 9/3

    Lec #2: Synchronous Digital Systems Introduction, FPGA (Slides)
    Reading: DDCA 1.1-1.3, 1.5-1.6, Chapter 5 of the Virtex-5 User's Guide (PreLab Reading)

    Review: DDCA 1.4-1.5, 2.1-2.6

    HW1 (due 9/12)

    Solution

    Dis #1 Lab #0: FPGA Development Board & Structural Verilog Introduction


    Thu 9/5

    Lec #3: Verilog Introduction (slides)

    DDCA 4.1-4.3, 4.5, 4.8


    3
    Tue 9/10

    Lec #4: Sequential Logic Review ( slides)

    DDCA 4.4, 4.6

    HW2 (due 9/19) Solution

    Dis #2 Lab #1: Mapping Circuits to FPGAs


    Thu 9/12

    Lec #5: Verilog & Circuit Synthesis ( slides)


    4
    Tue 9/17

    Lec #6: Circuit Simulation ( slides)

    DDCA 3.4, 4.9

    HW3 (due 9/26)

    Solution

    Dis #3 and Code Lab #2: Behavioral Synthesis
    Thu 9/19

    Lec #7: High-Level Design (part 1) ( slides)

    5 Tue 9/24

    Lec #8: Multipliers (part1) (slides)

    HW4 (due 10/3)

    Solution

    Dis #4 and Code Lab #3: Simulation and Testing


    Thu 9/26

    Lec #9: Parallelism & Pipelining (slides)

    6 Tue 10/1

    Lec #10: Component Interfacing and Control (slides)

    Virtex-5 User's Guide pg. 111-137, Libraries guide p. 108-124

    HW5 (due 10/10)

    Solution

    Dis #5

    Lab #4: List Processor and Chipscope

    Lab #4: Prelab Worksheet


    Thu 10/3

    Lec #11: SRAM ( slides)

    Xilinx Synthesis Tools pg. 126-152, Libraries Guide pg. 245-250
    7 Tue 10/8

    Lec #12: Video ( slides)

    DDCA 8.5, 8.6.3

    HW6 (due 10/17) Solution

    Dis #6 Lab #5B: Microblaze


    Shared Memory Tutorial

    Thu 10/10

    Lec #13: Accelerators ( slides)

    8 Tue 10/15

    Lec #14: Valid/Ready, FIFO 2 and SIFT (slides v2)

    HW7 (due 10/24) Solution

    Dis #7 Project Checkpoint 1
    Git, DVI
    Thu 10/17

    Lec #15: SIFT2 + FSM ( slides v2 )

    9 Tue 10/22

    Lec #16: Arbiter, Serial, A/D, CMOS ( slides )

    DDCA 3.5-3.6

    HW8 (due 11/7) Solution

    Dis #8

    Project Checkpoint 2

    SRAM Arbiter
    Thu 10/24

    Lec #17: Midterm review ( F97 Q2-2,5, Fin Q1 )

    10
    Tues 10/29
    Lec #18: Midterm (in class)
    Dis #9:

    Midterm Review

    Thu 10/31

    Lec #19: CMOS details ( slides)


    11
    Tue 11/5

    Lec #20: Timing Fundamentals (slides)


    Dis #10

    Project Checkpoint 3 (updated 11/13 so block diagram shows s=3 case)

    Design Proposal
    Thu 11/7

    Lec #21: Timing, Adders ( slides)


    12
    Tue 11/12

    Lec #22: Carry Look Ahead Adder, Multipliers (slides)

    HW9 (Due 11/21) Solution

    Dis #11 Project Checkpoint 4
    Gaussian filter of test image (Due week of 11/18)
    Thu 11/14

    Lec #23: Debugging digital designs, multipliers (slides)


    13
    Tue 11/19

    Lec #24: Power and Energy (J. Lazarro) (slides)

    Dis #12
    Thu 11/21

    Lec #25: Shifters and Counters ( slides)

    14
    Tue 11/26

    Lec #26: Faults and Error Correction Codes (slides)

    no discussion- project catchup Final Project Checkoff (due 12/6)

    Thanksgiving Holiday
    15 Tue 12/3

    Lec #27: GPUs (J. Lazarro) (slides)

    HW10 (not graded)

    Solution

    Dis #14

    Final Project Demonstrations (Friday 12/6 @ 11:00AM-12:30PM, 1:30PM-4:30PM)

    Thu 12/5

    Lec #28: Course Wrap Up (slides)

    16 Tue 12/10

    RRR Week, No Lecture



    Final Project Report Due Thursday 12/12 @ 12 pm in HW box

    Thu 12/12

    RRR Week, No Lecture

    17 Tues 12/17 Final Exam is Tuesday 12/17, 0810-1100